Key Points
- Meta unveiled four MTIA chip generations: 300, 400, 450, and 500.
- The chips ship on a roughly six-month cadence over the next two years.
- MTIA 450 doubles the HBM bandwidth of the 400 and targets AI inference.
- The line is co-developed with Broadcom to cut reliance on Nvidia GPUs.
Meta's pitch for its own AI silicon used to be a single chip and a lot of caveats. This week it became a roadmap. The company detailed four MTIA generations — 300, 400, 450, and 500 — and, more telling than any spec, a plan to ship a new one roughly every six months.
The first of those chips, Iris, enters manufacturing in September 2026.
Inference first, FLOPs second
The MTIA line is built around a bet that most of Meta's AI cost is not training models but running them — serving recommendations, ranking feeds, and generating responses billions of times a day. The chips prioritize high-bandwidth memory (HBM) over raw compute, because memory bandwidth, not FLOPs, is the bottleneck when a transformer is decoding a response. MTIA 300, already in production, handles ranking and recommendation training. MTIA 400 broadens to generative workloads. The 450 doubles the 400's HBM bandwidth, and from the 300 to the 500, Meta says HBM bandwidth rises 4.5x and compute climbs 25x.
A new chip every six months
The number that matters is not a transistor count. It is the six-month release cadence, co-developed with Broadcom, that lets Meta refresh its inference fleet on roughly the pace Nvidia refreshes its flagship GPUs. Meta is not trying to beat Nvidia on training — it is trying to stop paying Nvidia margins to run the models it has already trained. The same logic is reshaping the rest of the stack, from hyperscaler custom silicon to Nvidia's own push into PC chips as it hunts for growth beyond the data center.
For now the dependence is real: Meta still leans on Nvidia GPUs to train the models it then serves on MTIA. But four inference chips on a fixed cadence show where Meta means to take control — the part of the AI bill that recurs forever, every time a model runs rather than trains.
Source: Tom's Hardware
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